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Calcul haute performance

Calcul embarqué haute performance

Projets en cours:

Projet DeepAPMEA: Accelerating Processor for embedded MicroElectrode Array analysis using Deep Learning

July 31, 2019

In-vitro neural networks are cell cultures that permit a multiplicity of analysis useful for diagnostic purposes. Analysis on in-vitro neural networks can be studied through different types of sensing elements, among which, microelectrode arrays (MEA) are the most common. During a single experiment, MEA devices can generate huge amounts of data in the form of highly dimensional time series, which require specific analysis tools in order to extract useful data interpretable by biologists. The main goal of DeepAPMEA is to propose a digital hardware device endowed with state-of-the-art data analysis techniques. Two main issues will be addressed: (1) we will develop a set of methods for analyzing MEA data by using deep learning algorithms and (2) we will embed these algorithms in a hardware specific device based on FPGAs in order to perform data analysis.

February 28, 2018

Ce projet est un point de convergence entre des travaux de recherche passées vers de nouveaux paradigmes de calcul : neurosciences computationnelles, architectures neuromorphiques, architectures adaptatives reconfigurables et calcul cellulaire. Ce projet représente  un pas significatif vers la définition d'un vrai modèle de calcul distribué, adaptatif et décentralisé. Ce nouveau modèle permettra d'étudier l'intégration viable des systèmes neuromorphiques et des architectures conventionnelles de Von Neumann en dotant ces systèmes de calcul de nouvelles propriétés adaptatives.

March 31, 2018

The aim of this project is to design and implement a novel hardware platform for assessing TRNG for a given entropy source. The hardware platform will allow to perform post-processing of the entropy source to generate the desired probability distribution and embed suites of statistical tests (eg. NIST) and certifications (eg. AIS-31) for both instant online validation and extensive offline validation. The implementation will rely on an embedded hybrid computation device (eg. FPGA and HPS).

Our evaluation platform will be used to design and produce TRNG tailored to specific categories of devices and applications, such as embeddable System-on-Chip for IoT devices and data centers.

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Projets realisés:

Nowadays, processing applications require more and more computing capacities and the massive use of processor clusters tend to become more and more expansive regarding the obtained gain. Therefore, an interesting solution is to use heterogeneous high performance computing platform composed of FPGAs, General Purpose GPUs and embedded processors (e.g. ARM processors). All these elements being connected through a high-speed communication medium which is in this case a PCI Express link.

 

The ARROW platform integrating these three types of processing elements can substantially speed-up the execution of a target applications by allowing the most efficient computing resource for the execution of the different sub-tasks of the application.

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